Revolutionizing Wireless Transmitters: AI-Driven Efficiency and Higher Data Rates

[jeffrenvba]

Researchers from Science Tokyo, Japan, have developed three groundbreaking design techniques that significantly improve wireless transmitter performance, simultaneously boosting power efficiency and data rates. This advancement addresses the growing demand for high-speed, energy-efficient wireless communications, accelerating the deployment of interconnected electronic devices and enhancing modern life.
The Need for Smarter, More Efficient Wireless Communications

As artificial intelligence (AI) becomes increasingly integrated into daily life, the Internet of Things (IoT) is driving an unprecedented need for efficient wireless communication. Wireless transmitters, which send data via radio waves, are crucial to this network. However, IoT devices rely on battery power, making energy efficiency a critical challenge. To support AI’s growing data processing needs, transmitters must achieve high data rates while maintaining power efficiency—a balance that has been difficult to achieve.
Overcoming the Limitations of Traditional Digital Polar Transmitters

A widely used transmitter type, digital polar transmitters, encodes input data in polar coordinates (amplitude and phase) before transmission. However, this approach relies on the COordinate Rotation DIgital Computer (CORDIC), a circuit block that consumes significant power. Additionally, CORDIC generates multi-bit amplitude and phase signals, which require modulators prone to linearity issues due to manufacturing imperfections. These problems limit data rates and make it difficult to improve efficiency without sacrificing performance. Digital pre-distortion (DPD) can correct linearity issues but further increases power consumption.

To address these challenges, a research team led by Professor Kenichi Okada at the Institute of Science Tokyo (Science Tokyo) developed a CORDIC-less polar transmitter architecture using three innovative techniques. Their work, published in the Proceedings of the 2025 IEEE International Solid-State Circuits Conference (ISSCC), demonstrates how these techniques enable simultaneous improvements in power efficiency and data rates.
A New Approach: Three Key Innovations

The team's approach eliminates the need for CORDIC and enhances transmitter efficiency through three core techniques:

Delta-Sigma Modulator (DSM) Re-encoding
Instead of calculating polar coordinates directly, the researchers implemented two DSMs to convert input x and y signals into 3-level signals. Since these outputs generate only nine distinct amplitude-phase combinations, a simple nine-state look-up table (LUT) can determine the required amplitude and phase. This method reduces bit count (2-bit amplitude and 3-bit phase) and eliminates the need for power-intensive calculations, enabling linear amplitude and phase modulation.

1-Bit Amplitude Quantization for Improved Linearity
In conventional multi-bit modulation, manufacturing inconsistencies can cause errors in generating intermediate amplitude values. To eliminate this issue, the second technique quantizes the 2-bit amplitude signal to 1-bit, allowing the transmitter to switch only between zero and peak amplitude, ensuring complete linearity in amplitude modulation.

Efficient Phase Generation Using a Square Wave Approach
Traditional phase modulation requires precise interpolation of values between 0° and 360°, which can be computationally expensive. The third technique simplifies this process by leveraging a square wave running at four times the carrier frequency. Instead of complex interpolation, the transmitter generates eight distinct phases (each separated by 45°) by multiplexing different edges of the square wave, achieving highly efficient and accurate phase modulation.

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By integrating these techniques, the researchers eliminated the need for power-intensive calibration procedures while ensuring high linearity in both amplitude and phase modulation.
Performance Validation and Future Impact

The research team implemented their digital transmitter using a 65nm CMOS process and compared its performance to other state-of-the-art designs. Their results demonstrated unprecedented power efficiency and data rates, surpassing conventional transmitters without compromising one for the other.

"By applying these techniques, we achieved top-tier power efficiency and data rates, thanks to our CORDIC-less polar transmitter architecture," concludes Okada.

This breakthrough has the potential to drive technological advancements across various applications, including IoT, AI-powered systems, and next-generation wireless communication. By eliminating traditional limitations, this innovative architecture paves the way for faster, more energy-efficient wireless networks, shaping the future of connected technology.